The present invention relates to semiconductor memory integrated circuit devices, such as dynamic random access memory (DRAM) devices, and more particularly to repairing a memory device when it is deployed in a memory module in a computing system.
With the increasing density of memory modules, such as dual in-line memory modules (DIMMs), sparse failures of the DRAM chips that make up the memory modules become an increasing economic concern for the memory manufacturer. At the same time, computer system manufacturers of large server computers face an increasing challenge in achieving the desired reliability of their systems with ever-increasing memory capacities. Currently, computer systems collect fail addresses (via failure scrubbing and error correction logs) but they do not repair failing addresses until the entire memory module with the affected memory device is exchanged during the next maintenance downtime.
Therefore, the capability of an in-situ repair of faulty memory addresses while the system is running would be highly beneficial to both memory manufacturers and system manufacturers.